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<h1>System Peripherals Peripheral</h1>
<null><a name="SYS"></a><b>SYS</b> <i><font size="-1">(<a href="AT91SAM7S256_h.html#AT91S_SYS">AT91S_SYS</a>)</font></i><b>  0xFFFFF000 </b><i><font size="-1">(<a href="AT91SAM7S256_h.html#AT91C_BASE_SYS">AT91C_BASE_SYS</a>)</font></i>
<br></null><a name="SYS"></a><h2>SYS Software API <i><font size="-1">(<a href="AT91SAM7S256_h.html#AT91S_SYS">AT91S_SYS</a>)</font></i></h2>
<a name="SYS"></a><null><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><font size="-1"><b>Offset</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Field</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Description</b></font></th>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x0</b></font></td><td><font size="-1">AIC_SMR[32] (<a href="#AIC_SMR">AIC_SMR</a>)</font></td><td><font size="-1">Source Mode Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x80</b></font></td><td><font size="-1">AIC_SVR[32] (<a href="#AIC_SVR">AIC_SVR</a>)</font></td><td><font size="-1">Source Vector Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x100</b></font></td><td><font size="-1"><a href="#AIC_IVR">AIC_IVR</a></font></td><td><font size="-1">IRQ Vector Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x104</b></font></td><td><font size="-1"><a href="#AIC_FVR">AIC_FVR</a></font></td><td><font size="-1">FIQ Vector Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x108</b></font></td><td><font size="-1"><a href="#AIC_ISR">AIC_ISR</a></font></td><td><font size="-1">Interrupt Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x10C</b></font></td><td><font size="-1"><a href="#AIC_IPR">AIC_IPR</a></font></td><td><font size="-1">Interrupt Pending Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x110</b></font></td><td><font size="-1"><a href="#AIC_IMR">AIC_IMR</a></font></td><td><font size="-1">Interrupt Mask Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x114</b></font></td><td><font size="-1"><a href="#AIC_CISR">AIC_CISR</a></font></td><td><font size="-1">Core Interrupt Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x120</b></font></td><td><font size="-1"><a href="#AIC_IECR">AIC_IECR</a></font></td><td><font size="-1">Interrupt Enable Command Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x124</b></font></td><td><font size="-1"><a href="#AIC_IDCR">AIC_IDCR</a></font></td><td><font size="-1">Interrupt Disable Command Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x128</b></font></td><td><font size="-1"><a href="#AIC_ICCR">AIC_ICCR</a></font></td><td><font size="-1">Interrupt Clear Command Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x12C</b></font></td><td><font size="-1"><a href="#AIC_ISCR">AIC_ISCR</a></font></td><td><font size="-1">Interrupt Set Command Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x130</b></font></td><td><font size="-1"><a href="#AIC_EOICR">AIC_EOICR</a></font></td><td><font size="-1">End of Interrupt Command Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x134</b></font></td><td><font size="-1"><a href="#AIC_SPU">AIC_SPU</a></font></td><td><font size="-1">Spurious Vector Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x138</b></font></td><td><font size="-1"><a href="#AIC_DCR">AIC_DCR</a></font></td><td><font size="-1">Debug Control Register (Protect)</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x140</b></font></td><td><font size="-1"><a href="#AIC_FFER">AIC_FFER</a></font></td><td><font size="-1">Fast Forcing Enable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x144</b></font></td><td><font size="-1"><a href="#AIC_FFDR">AIC_FFDR</a></font></td><td><font size="-1">Fast Forcing Disable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x148</b></font></td><td><font size="-1"><a href="#AIC_FFSR">AIC_FFSR</a></font></td><td><font size="-1">Fast Forcing Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x200</b></font></td><td><font size="-1"><a href="AT91SAM7S256_DBGU.html#DBGU_CR">DBGU_CR</a></font></td><td><font size="-1">Control Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x204</b></font></td><td><font size="-1"><a href="AT91SAM7S256_DBGU.html#DBGU_MR">DBGU_MR</a></font></td><td><font size="-1">Mode Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x208</b></font></td><td><font size="-1"><a href="AT91SAM7S256_DBGU.html#DBGU_IER">DBGU_IER</a></font></td><td><font size="-1">Interrupt Enable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x20C</b></font></td><td><font size="-1"><a href="AT91SAM7S256_DBGU.html#DBGU_IDR">DBGU_IDR</a></font></td><td><font size="-1">Interrupt Disable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x210</b></font></td><td><font size="-1"><a href="AT91SAM7S256_DBGU.html#DBGU_IMR">DBGU_IMR</a></font></td><td><font size="-1">Interrupt Mask Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x214</b></font></td><td><font size="-1"><a href="AT91SAM7S256_DBGU.html#DBGU_CSR">DBGU_CSR</a></font></td><td><font size="-1">Channel Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x218</b></font></td><td><font size="-1"><a href="AT91SAM7S256_DBGU.html#DBGU_RHR">DBGU_RHR</a></font></td><td><font size="-1">Receiver Holding Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x21C</b></font></td><td><font size="-1"><a href="AT91SAM7S256_DBGU.html#DBGU_THR">DBGU_THR</a></font></td><td><font size="-1">Transmitter Holding Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x220</b></font></td><td><font size="-1"><a href="AT91SAM7S256_DBGU.html#DBGU_BRGR">DBGU_BRGR</a></font></td><td><font size="-1">Baud Rate Generator Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x240</b></font></td><td><font size="-1"><a href="AT91SAM7S256_DBGU.html#DBGU_CIDR">DBGU_CIDR</a></font></td><td><font size="-1">Chip ID Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x244</b></font></td><td><font size="-1"><a href="AT91SAM7S256_DBGU.html#DBGU_EXID">DBGU_EXID</a></font></td><td><font size="-1">Chip ID Extension Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x248</b></font></td><td><font size="-1"><a href="AT91SAM7S256_DBGU.html#DBGU_FNTR">DBGU_FNTR</a></font></td><td><font size="-1">Force NTRST Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x300</b></font></td><td><font size="-1">DBGU_RPR (<a href="AT91SAM7S256_PDC.html#PDC_RPR">PDC_RPR</a>)</font></td><td><font size="-1">Receive Pointer Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x304</b></font></td><td><font size="-1">DBGU_RCR (<a href="AT91SAM7S256_PDC.html#PDC_RCR">PDC_RCR</a>)</font></td><td><font size="-1">Receive Counter Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x308</b></font></td><td><font size="-1">DBGU_TPR (<a href="AT91SAM7S256_PDC.html#PDC_TPR">PDC_TPR</a>)</font></td><td><font size="-1">Transmit Pointer Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x30C</b></font></td><td><font size="-1">DBGU_TCR (<a href="AT91SAM7S256_PDC.html#PDC_TCR">PDC_TCR</a>)</font></td><td><font size="-1">Transmit Counter Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x310</b></font></td><td><font size="-1">DBGU_RNPR (<a href="AT91SAM7S256_PDC.html#PDC_RNPR">PDC_RNPR</a>)</font></td><td><font size="-1">Receive Next Pointer Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x314</b></font></td><td><font size="-1">DBGU_RNCR (<a href="AT91SAM7S256_PDC.html#PDC_RNCR">PDC_RNCR</a>)</font></td><td><font size="-1">Receive Next Counter Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x318</b></font></td><td><font size="-1">DBGU_TNPR (<a href="AT91SAM7S256_PDC.html#PDC_TNPR">PDC_TNPR</a>)</font></td><td><font size="-1">Transmit Next Pointer Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x31C</b></font></td><td><font size="-1">DBGU_TNCR (<a href="AT91SAM7S256_PDC.html#PDC_TNCR">PDC_TNCR</a>)</font></td><td><font size="-1">Transmit Next Counter Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x320</b></font></td><td><font size="-1">DBGU_PTCR (<a href="AT91SAM7S256_PDC.html#PDC_PTCR">PDC_PTCR</a>)</font></td><td><font size="-1">PDC Transfer Control Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x324</b></font></td><td><font size="-1">DBGU_PTSR (<a href="AT91SAM7S256_PDC.html#PDC_PTSR">PDC_PTSR</a>)</font></td><td><font size="-1">PDC Transfer Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x400</b></font></td><td><font size="-1">PIOA_PER (<a href="#PIO_PER">PIO_PER</a>)</font></td><td><font size="-1">PIO Enable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x404</b></font></td><td><font size="-1">PIOA_PDR (<a href="#PIO_PDR">PIO_PDR</a>)</font></td><td><font size="-1">PIO Disable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x408</b></font></td><td><font size="-1">PIOA_PSR (<a href="#PIO_PSR">PIO_PSR</a>)</font></td><td><font size="-1">PIO Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x410</b></font></td><td><font size="-1">PIOA_OER (<a href="#PIO_OER">PIO_OER</a>)</font></td><td><font size="-1">Output Enable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x414</b></font></td><td><font size="-1">PIOA_ODR (<a href="#PIO_ODR">PIO_ODR</a>)</font></td><td><font size="-1">Output Disable Registerr</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x418</b></font></td><td><font size="-1">PIOA_OSR (<a href="#PIO_OSR">PIO_OSR</a>)</font></td><td><font size="-1">Output Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x420</b></font></td><td><font size="-1">PIOA_IFER (<a href="#PIO_IFER">PIO_IFER</a>)</font></td><td><font size="-1">Input Filter Enable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x424</b></font></td><td><font size="-1">PIOA_IFDR (<a href="#PIO_IFDR">PIO_IFDR</a>)</font></td><td><font size="-1">Input Filter Disable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x428</b></font></td><td><font size="-1">PIOA_IFSR (<a href="#PIO_IFSR">PIO_IFSR</a>)</font></td><td><font size="-1">Input Filter Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x430</b></font></td><td><font size="-1">PIOA_SODR (<a href="#PIO_SODR">PIO_SODR</a>)</font></td><td><font size="-1">Set Output Data Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x434</b></font></td><td><font size="-1">PIOA_CODR (<a href="#PIO_CODR">PIO_CODR</a>)</font></td><td><font size="-1">Clear Output Data Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x438</b></font></td><td><font size="-1">PIOA_ODSR (<a href="#PIO_ODSR">PIO_ODSR</a>)</font></td><td><font size="-1">Output Data Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x43C</b></font></td><td><font size="-1">PIOA_PDSR (<a href="#PIO_PDSR">PIO_PDSR</a>)</font></td><td><font size="-1">Pin Data Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x440</b></font></td><td><font size="-1">PIOA_IER (<a href="#PIO_IER">PIO_IER</a>)</font></td><td><font size="-1">Interrupt Enable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x444</b></font></td><td><font size="-1">PIOA_IDR (<a href="#PIO_IDR">PIO_IDR</a>)</font></td><td><font size="-1">Interrupt Disable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x448</b></font></td><td><font size="-1">PIOA_IMR (<a href="#PIO_IMR">PIO_IMR</a>)</font></td><td><font size="-1">Interrupt Mask Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x44C</b></font></td><td><font size="-1">PIOA_ISR (<a href="#PIO_ISR">PIO_ISR</a>)</font></td><td><font size="-1">Interrupt Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x450</b></font></td><td><font size="-1">PIOA_MDER (<a href="#PIO_MDER">PIO_MDER</a>)</font></td><td><font size="-1">Multi-driver Enable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x454</b></font></td><td><font size="-1">PIOA_MDDR (<a href="#PIO_MDDR">PIO_MDDR</a>)</font></td><td><font size="-1">Multi-driver Disable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x458</b></font></td><td><font size="-1">PIOA_MDSR (<a href="#PIO_MDSR">PIO_MDSR</a>)</font></td><td><font size="-1">Multi-driver Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x460</b></font></td><td><font size="-1">PIOA_PPUDR (<a href="#PIO_PPUDR">PIO_PPUDR</a>)</font></td><td><font size="-1">Pull-up Disable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x464</b></font></td><td><font size="-1">PIOA_PPUER (<a href="#PIO_PPUER">PIO_PPUER</a>)</font></td><td><font size="-1">Pull-up Enable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x468</b></font></td><td><font size="-1">PIOA_PPUSR (<a href="#PIO_PPUSR">PIO_PPUSR</a>)</font></td><td><font size="-1">Pull-up Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x470</b></font></td><td><font size="-1">PIOA_ASR (<a href="#PIO_ASR">PIO_ASR</a>)</font></td><td><font size="-1">Select A Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x474</b></font></td><td><font size="-1">PIOA_BSR (<a href="#PIO_BSR">PIO_BSR</a>)</font></td><td><font size="-1">Select B Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x478</b></font></td><td><font size="-1">PIOA_ABSR (<a href="#PIO_ABSR">PIO_ABSR</a>)</font></td><td><font size="-1">AB Select Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x4A0</b></font></td><td><font size="-1">PIOA_OWER (<a href="#PIO_OWER">PIO_OWER</a>)</font></td><td><font size="-1">Output Write Enable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x4A4</b></font></td><td><font size="-1">PIOA_OWDR (<a href="#PIO_OWDR">PIO_OWDR</a>)</font></td><td><font size="-1">Output Write Disable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x4A8</b></font></td><td><font size="-1">PIOA_OWSR (<a href="#PIO_OWSR">PIO_OWSR</a>)</font></td><td><font size="-1">Output Write Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xC00</b></font></td><td><font size="-1"><a href="#PMC_SCER">PMC_SCER</a></font></td><td><font size="-1">System Clock Enable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xC04</b></font></td><td><font size="-1"><a href="#PMC_SCDR">PMC_SCDR</a></font></td><td><font size="-1">System Clock Disable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xC08</b></font></td><td><font size="-1"><a href="#PMC_SCSR">PMC_SCSR</a></font></td><td><font size="-1">System Clock Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xC10</b></font></td><td><font size="-1"><a href="#PMC_PCER">PMC_PCER</a></font></td><td><font size="-1">Peripheral Clock Enable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xC14</b></font></td><td><font size="-1"><a href="#PMC_PCDR">PMC_PCDR</a></font></td><td><font size="-1">Peripheral Clock Disable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xC18</b></font></td><td><font size="-1"><a href="#PMC_PCSR">PMC_PCSR</a></font></td><td><font size="-1">Peripheral Clock Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xC20</b></font></td><td><font size="-1">PMC_MOR (<a href="#CKGR_MOR">CKGR_MOR</a>)</font></td><td><font size="-1">Main Oscillator Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xC24</b></font></td><td><font size="-1">PMC_MCFR (<a href="#CKGR_MCFR">CKGR_MCFR</a>)</font></td><td><font size="-1">Main Clock  Frequency Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xC2C</b></font></td><td><font size="-1">PMC_PLLR (<a href="#CKGR_PLLR">CKGR_PLLR</a>)</font></td><td><font size="-1">PLL Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xC30</b></font></td><td><font size="-1"><a href="#PMC_MCKR">PMC_MCKR</a></font></td><td><font size="-1">Master Clock Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xC40</b></font></td><td><font size="-1">PMC_PCKR[3] (<a href="#PMC_PCKR">PMC_PCKR</a>)</font></td><td><font size="-1">Programmable Clock Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xC60</b></font></td><td><font size="-1"><a href="#PMC_IER">PMC_IER</a></font></td><td><font size="-1">Interrupt Enable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xC64</b></font></td><td><font size="-1"><a href="#PMC_IDR">PMC_IDR</a></font></td><td><font size="-1">Interrupt Disable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xC68</b></font></td><td><font size="-1"><a href="#PMC_SR">PMC_SR</a></font></td><td><font size="-1">Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xC6C</b></font></td><td><font size="-1"><a href="#PMC_IMR">PMC_IMR</a></font></td><td><font size="-1">Interrupt Mask Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xD00</b></font></td><td><font size="-1"><a href="#RSTC_RCR">RSTC_RCR</a></font></td><td><font size="-1">Reset Control Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xD04</b></font></td><td><font size="-1"><a href="#RSTC_RSR">RSTC_RSR</a></font></td><td><font size="-1">Reset Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xD08</b></font></td><td><font size="-1"><a href="#RSTC_RMR">RSTC_RMR</a></font></td><td><font size="-1">Reset Mode Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xD20</b></font></td><td><font size="-1"><a href="#RTTC_RTMR">RTTC_RTMR</a></font></td><td><font size="-1">Real-time Mode Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xD24</b></font></td><td><font size="-1"><a href="#RTTC_RTAR">RTTC_RTAR</a></font></td><td><font size="-1">Real-time Alarm Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xD28</b></font></td><td><font size="-1"><a href="#RTTC_RTVR">RTTC_RTVR</a></font></td><td><font size="-1">Real-time Value Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xD2C</b></font></td><td><font size="-1"><a href="#RTTC_RTSR">RTTC_RTSR</a></font></td><td><font size="-1">Real-time Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xD30</b></font></td><td><font size="-1"><a href="#PITC_PIMR">PITC_PIMR</a></font></td><td><font size="-1">Period Interval Mode Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xD34</b></font></td><td><font size="-1"><a href="#PITC_PISR">PITC_PISR</a></font></td><td><font size="-1">Period Interval Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xD38</b></font></td><td><font size="-1"><a href="#PITC_PIVR">PITC_PIVR</a></font></td><td><font size="-1">Period Interval Value Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xD3C</b></font></td><td><font size="-1"><a href="#PITC_PIIR">PITC_PIIR</a></font></td><td><font size="-1">Period Interval Image Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xD40</b></font></td><td><font size="-1"><a href="#WDTC_WDCR">WDTC_WDCR</a></font></td><td><font size="-1">Watchdog Control Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xD44</b></font></td><td><font size="-1"><a href="#WDTC_WDMR">WDTC_WDMR</a></font></td><td><font size="-1">Watchdog Mode Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xD48</b></font></td><td><font size="-1"><a href="#WDTC_WDSR">WDTC_WDSR</a></font></td><td><font size="-1">Watchdog Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0xD60</b></font></td><td><font size="-1"><a href="#VREG_MR">VREG_MR</a></font></td><td><font size="-1">Voltage Regulator Mode Register</font></td></tr>
</null></table><br></null><h2>SYS Register Description</h2>
<null><a name="SYS_AIC"></a><h4><a href="#SYS">SYS</a>: <i><a href="AT91SAM7S256_h.html#AT91S_AIC">AT91S_AIC</a></i> SYS_AIC  <i>Advanced Interrupt Controller</i></h4><ul><null><font size="-2"><li><b>SYS</b> <i><a href="#AT91C_SYS_AIC">AT91C_SYS_AIC</a></i> 0xFFFFF000</font></null></ul><a name="SYS_DBGU"></a><h4><a href="#SYS">SYS</a>: <i><a href="AT91SAM7S256_h.html#AT91S_DBGU">AT91S_DBGU</a></i> SYS_DBGU  <i>Debug Unit</i></h4><ul><null><font size="-2"><li><b>SYS</b> <i><a href="#AT91C_SYS_DBGU">AT91C_SYS_DBGU</a></i> 0xFFFFF200</font></null></ul><a name="SYS_PIOA"></a><h4><a href="#SYS">SYS</a>: <i><a href="AT91SAM7S256_h.html#AT91S_PIO">AT91S_PIO</a></i> SYS_PIOA  <i>PIO A Controller</i></h4><ul><null><font size="-2"><li><b>SYS</b> <i><a href="#AT91C_SYS_PIOA">AT91C_SYS_PIOA</a></i> 0xFFFFF400</font></null></ul><a name="SYS_PMC"></a><h4><a href="#SYS">SYS</a>: <i><a href="AT91SAM7S256_h.html#AT91S_PMC">AT91S_PMC</a></i> SYS_PMC  <i>Power Management Controller</i></h4><ul><null><font size="-2"><li><b>SYS</b> <i><a href="#AT91C_SYS_PMC">AT91C_SYS_PMC</a></i> 0xFFFFFC00</font></null></ul><a name="SYS_RSTC"></a><h4><a href="#SYS">SYS</a>: <i><a href="AT91SAM7S256_h.html#AT91S_RSTC">AT91S_RSTC</a></i> SYS_RSTC  <i>Reset Controller</i></h4><ul><null><font size="-2"><li><b>SYS</b> <i><a href="#AT91C_SYS_RSTC">AT91C_SYS_RSTC</a></i> 0xFFFFFD00</font></null></ul><a name="SYS_RTTC"></a><h4><a href="#SYS">SYS</a>: <i><a href="AT91SAM7S256_h.html#AT91S_RTTC">AT91S_RTTC</a></i> SYS_RTTC  <i>Real Time Timer Controller</i></h4><ul><null><font size="-2"><li><b>SYS</b> <i><a href="#AT91C_SYS_RTTC">AT91C_SYS_RTTC</a></i> 0xFFFFFD20</font></null></ul><a name="SYS_PITC"></a><h4><a href="#SYS">SYS</a>: <i><a href="AT91SAM7S256_h.html#AT91S_PITC">AT91S_PITC</a></i> SYS_PITC  <i>Periodic Interval Timer Controller</i></h4><ul><null><font size="-2"><li><b>SYS</b> <i><a href="#AT91C_SYS_PITC">AT91C_SYS_PITC</a></i> 0xFFFFFD30</font></null></ul><a name="SYS_WDTC"></a><h4><a href="#SYS">SYS</a>: <i><a href="AT91SAM7S256_h.html#AT91S_WDTC">AT91S_WDTC</a></i> SYS_WDTC  <i>Watchdog Timer Controller</i></h4><ul><null><font size="-2"><li><b>SYS</b> <i><a href="#AT91C_SYS_WDTC">AT91C_SYS_WDTC</a></i> 0xFFFFFD40</font></null></ul><a name="SYS_VREG"></a><h4><a href="#SYS">SYS</a>: <i><a href="AT91SAM7S256_h.html#AT91S_VREG">AT91S_VREG</a></i> SYS_VREG  <i>Voltage Regulator Mode Register</i></h4><ul><null><font size="-2"><li><b>SYS</b> <i><a href="#AT91C_SYS_VREG">AT91C_SYS_VREG</a></i> 0xFFFFFD60</font></null></ul></null><hr></html>
